Epson S1C33210 Manual de usuario Pagina 1

MF1517-01Technical ManualCMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33210 PRODUCT PART S1C33210 FUNCTION PARTS1C33210

TABLE OF CONTENTSvi EPSONIII-7 CLOCK TIMER ...B-III-7-1Co

8 ELECTRICAL CHARACTERISTICSA-86 EPSON S1C33210 PRODUCT PART8.8 PLL CharacteristicsSetting the PLLS0 and PLLS1 pins (recommended operating condition)

9 PACKAGES1C33210 PRODUCT PART EPSON A-879 Package9.1 Plastic PackageQFP15-128pin(Unit: mm)14±0.116±0.4659614±0.116±0.43364INDEX0.16321128971.4±0.10.

10 PAD LAYOUTA-88 EPSON S1C33210 PRODUCT PART10 Pad Layout10.1 Pad Layout DiagramXY(0, 0)TBD mmTBD mm1 5 10 15 20 25 30 35 40 45 50 55 60657075808590

10 PAD LAYOUTS1C33210 PRODUCT PART EPSON A-8910.2 Pad Coordinate(Unit: µm)No. Pad name X Y No. Pad name X Y1 P15/EXCL4/#DMAEND0 -2.352 -2.54 51 K62/A

10 PAD LAYOUTA-90 EPSON S1C33210 PRODUCT PARTNo. Pad name X Y No. Pad name X Y101 N.C. 2.834 1.554 151 N.C. -1.26 2.54102 P35/#BUSACK 2.834 1.638 152

10 PAD LAYOUTS1C33210 PRODUCT PART EPSON A-91No. Pad name X Y201 N.C. -2.834 -0.966202 P23/TM1 -2.834 -1.05203 N.C. -2.834 -1.134204 DSIO -2.834 -1.2

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-92 EPSON S1C33210 PRODUCT PARTAppendix A <Reference> External Device Interfac

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-93A.1 DRAM (70ns)DRAM interface setup examples – 70nsOp

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-94 EPSON S1C33210 PRODUCT PARTDRAM: 70ns, CPU: 33MHz, random read/write cycle2RAS c

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-95DRAM: 70ns, CPU: 25/20MHz, random read/write cycle1RA

TABLE OF CONTENTSEPSON viiOverview...

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-96 EPSON S1C33210 PRODUCT PARTA.2 DRAM (60ns)DRAM interface setup examples – 60nsOp

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-97DRAM: 60ns, CPU: 33MHz, random read/write cycle2RAS c

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-98 EPSON S1C33210 PRODUCT PARTDRAM: 60ns, CPU: 25MHz, random read/write cycle1RAS c

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-99DRAM: 60ns, CPU: 20MHz, random read/write cycle1RAS c

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-100 EPSON S1C33210 PRODUCT PARTA.3 ROM and Burst ROMBurst ROM and mask ROM interfac

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-101ROM: 100ns, CPU: 25MHz, normal readBCLKA[23:0]#CE9,

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-102 EPSON S1C33210 PRODUCT PARTA.4 SRAM (55ns)SRAM interface setup examples – 55nsO

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-103SRAM: 55ns, CPU: 20MHz, read cycleBCLKA[23:0]#CEx#RD

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-104 EPSON S1C33210 PRODUCT PARTA.5 SRAM (70ns)SRAM interface setup examples – 70nsO

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSS1C33210 PRODUCT PART EPSON A-105SRAM: 70ns, CPU: 25/20MHz, read cycleBCLKA[23:0]#CEx

TABLE OF CONTENTSviii EPSONIV ANALOG BLOCKIV-1 INTRODUCTION...

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGSA-106 EPSON S1C33210 PRODUCT PARTA.6 8255A8255A interface setup examplesOperating Rea

APPENDIX B PIN CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-107Appendix B Pin CharacteristicsPin No. Signal name I/O cell Characteristic Pull-up/ P

APPENDIX B PIN CHARACTERISTICSA-108 EPSON S1C33210 PRODUCT PARTPin No. Signal name I/O cell Characteristic Pull-up/ Power Remarksname Input Output

APPENDIX B PIN CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-109Pin No. Signal name I/O cell Characteristic Pull-up/ Power Remarksname Input Output

APPENDIX B PIN CHARACTERISTICSA-110 EPSON S1C33210 PRODUCT PARTTHIS PAGE IS BLANK.

S1C33210FUNCTION PART

S1C33210 FUNCTION PARTI OUTLINE

I OUTLINE: INTRODUCTIONS1C33210 FUNCTION PART EPSON B-I-1-1I-1 INTRODUCTIONThe Function Part gives a detailed description of the various function bloc

S1C33210PRODUCT PART

I OUTLINE: INTRODUCTIONB-I-1-2 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

I OUTLINE: BLOCK DIAGRAMS1C33210 FUNCTION PART EPSON B-I-2-1I-2 BLOCK DIAGRAMThe S1C33210 consists of five major blocks: C33 Core Block, C33 Periphera

I OUTLINE: BLOCK DIAGRAMB-I-2-2 EPSON S1C33210 FUNCTION PARTC33 Core BlockThe C33 Core Block consists of a functional block C33_CORE including CPU, BC

I OUTLINE: LIST OF PINSS1C33210 FUNCTION PART EPSON B-I-3-1I-3 LIST OF PINSList of External I/O PinsThe following lists the external I/O pins of the C

I OUTLINE: LIST OF PINSB-I-3-2 EPSON S1C33210 FUNCTION PARTPin name I/O Pull-up FunctionP30#WAIT#CE4&5I/O – P30: I/O port when CFP30(D0/0x402DC) =

I OUTLINE: LIST OF PINSS1C33210 FUNCTION PART EPSON B-I-3-3Table 3.3 List of Pins for Internal Peripheral CircuitsPin name I/O Pull-up FunctionK52#AD

I OUTLINE: LIST OF PINSB-I-3-4 EPSON S1C33210 FUNCTION PARTPin name I/O Pull-up FunctionP16EXCL5#DMAEND1I/O – P16: I/O port when CFP16(D6/0x402D4) = &

I OUTLINE: LIST OF PINSS1C33210 FUNCTION PART EPSON B-I-3-5Table 3.4 List of Pins for Clock GeneratorPin name I/O Pull-up FunctionOSC1 I – Low-speed

I OUTLINE: LIST OF PINSB-I-3-6 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

S1C33210 FUNCTION PARTII CORE BLOCK

II CORE BLOCK: INTRODUCTIONS1C33210 FUNCTION PART EPSON B-II-1-1II-1 INTRODUCTIONThe core block consists of a functional block C33_CORE including CPU,

II CORE BLOCK: INTRODUCTIONB-II-1-2 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

II CORE BLOCK: CPU AND OPERATING MODES1C33210 FUNCTION PART EPSON B-II-2-1II-2 CPU AND OPERATING MODECPUThe C33 Core Block employs the S1C33000 32-bi

II CORE BLOCK: CPU AND OPERATING MODEB-II-2-2 EPSON S1C33210 FUNCTION PARTStandby ModeThe CPU supports three standby modes: two HALT modes and a SLEEP

II CORE BLOCK: CPU AND OPERATING MODES1C33210 FUNCTION PART EPSON B-II-2-3Notes on Standby ModeInterruptsThe standby mode can be canceled by an interr

II CORE BLOCK: CPU AND OPERATING MODEB-II-2-4 EPSON S1C33210 FUNCTION PARTTrap TableTable 2.1 shows the trap table in the C33 Core. Refer to the "

II CORE BLOCK: CPU AND OPERATING MODES1C33210 FUNCTION PART EPSON B-II-2-5HEXNo.Vector number(Hex address)Exception/interrupt name Exception/interrupt

II CORE BLOCK: CPU AND OPERATING MODEB-II-2-6 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

II CORE BLOCK: INITIAL RESETS1C33210 FUNCTION PART EPSON B-II-3-1II-3 INITIAL RESETPins for Initial ResetTable 3.1 shows the pins used for initial res

1 OUTLINES1C33210 PRODUCT PART EPSON A-11 OutlineThe S1C33210 is a Seiko Epson original 32-bit microcomputer. It features high speed, low power consu

II CORE BLOCK: INITIAL RESETB-II-3-2 EPSON S1C33210 FUNCTION PARTPower-on ResetBe sure to reset (cold start) the chip after turning on the power to st

II CORE BLOCK: INITIAL RESETS1C33210 FUNCTION PART EPSON B-II-3-3Boot AddressWhen the core CPU is initially reset, it reads the reset vector (program

II CORE BLOCK: INITIAL RESETB-II-3-4 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-1II-4 BCU (Bus Control Unit)The BCU (Bus Control Unit) provides an interface

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-2 EPSON S1C33210 FUNCTION PARTUser interface signalsTable 4.2 List of User Interface SignalsSignal name I

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-3Combination of System Bus Control SignalsThe bus control signal pins that ha

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-4 EPSON S1C33210 FUNCTION PARTMemory AreaMemory MapFigure 4.1 shows the memory map supported by the BCU.In

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-5External Memory Map and Chip EnableThe BCU has a 24-bit external address bus

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-6 EPSON S1C33210 FUNCTION PARTAreaArea 17+18 (#CE17+18) SRAM type 8 or 16 bitsAreas 15–16 (#CE15+16) SR

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-7Using Internal Memory on External Memory AreaThe BCU allows using of an inte

1 OUTLINEA-2 EPSON S1C33210 PRODUCT PARTGeneral-purpose input Shared with the I/O pins for internal peripheral circuitsand output ports: Input port 7

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-8 EPSON S1C33210 FUNCTION PARTArea 10Area 10 is an external memory area that includes the boot address (0x

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-9Setting External Bus ConditionsThe type, size, and wait conditions of a devi

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-10 EPSON S1C33210 FUNCTION PARTSetting SRAM Timing ConditionsThe areas set for the SRAM allow wait cycles

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-11Output disable delay timeIn cases when a device having a long output disabl

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-12 EPSON S1C33210 FUNCTION PARTBus OperationData Arrangement in MemoryThe S1C33 Family of devices handle d

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-13These bus operations are shown in the figure below, taking the example of t

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-14 EPSON S1C33210 FUNCTION PARTByte 115 Data bus 0#WRL1#WRH1A00A1∗No.1Byte 0Bus

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-15Ignored15 Data bus 0#WRL1111#WRHXXXXA00101A10011N

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-16 EPSON S1C33210 FUNCTION PARTIgnored15 Data bus 0#WRL1#WRHXA0∗A1∗No.1Byte 0Byt

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-17Since the bus clock is generated from the CPU system clock (CPU_CLK), the f

1 OUTLINES1C33210 PRODUCT PART EPSON A-31.2 Block DiagramVDDVSSA[23:0]D[15:0]#RD#WRL/#WR/#WE#WRH/#BSH#HCAS#LCAS#CE10EX #CE[9:4]#WAIT(P30)#DRD(P20)#DW

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-18 EPSON S1C33210 FUNCTION PARTBus Cycles in External System InterfaceThe following shows a sample SRAM co

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-19The above example shows a read cycle when a wait mode is inserted via the #

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-20 EPSON S1C33210 FUNCTION PARTSRAM Write CyclesBasic write cycle with no wait modeBCLKA[23:0]#CExxD[15:0]

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-21Write cycle with wait modeExample: When the BCU has no internal wait mode,

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-22 EPSON S1C33210 FUNCTION PARTBurst ROM Read CyclesBurst read cycleExample: When 4-consecutive-burst and

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-23DRAM Direct InterfaceOutline of DRAM InterfaceThe BCU incorporates a DRAM d

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-24 EPSON S1C33210 FUNCTION PARTDRAM Setting ConditionsThe DRAM interface allows the following conditions

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-25Column address sizeWhen accessing DRAM, addresses are divided into a row ad

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-26 EPSON S1C33210 FUNCTION PARTRefresh RPC delayUse RPC0 to set the RPC delay value of a refresh cycle (a

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-27DRAM Read/Write CyclesThe following shows the basic bus cycles of DRAM.The

1 OUTLINEA-4 EPSON S1C33210 PRODUCT PART1.3 Pin Description1.3.1 Pin Layout Diagram (plastic package)QFP15-128pin65963364INDEX32112897No.123456789101

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-28 EPSON S1C33210 FUNCTION PARTDRAM random write cycleExample: RAS: 1 cycle; CAS: 2 cycles; Precharge: 1 c

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-29Operation in successive RAS modeExample: RAS: 2 cycles; CAS: 1 cycle; Prech

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-30 EPSON S1C33210 FUNCTION PARTDRAM Refresh CyclesThe DRAM interface supports a CAS-before-RAS refresh cyc

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-31Normally, DRAM specifications require that the contents of all row addresse

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-32 EPSON S1C33210 FUNCTION PARTDRAM refresh when bus ownership control is releasedIn systems where DRAM is

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-33I/O Memory of BCUTable 4.21 shows the control bits of the BCU. These I/O me

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-34 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–A12SZA12DF1

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-35NameAddressRegister name Bit Function Setting Init. R/W Remarks–A6DF1A6DF0–

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-36 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks1 Successive

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-37A18SZ:Areas 18–17 device size selection (DE) / Areas 18–15 set-up register

1 OUTLINES1C33210 PRODUCT PART EPSON A-51.3.2 Pin FunctionsTable 1.3.1 List of Pins for Power Supply SystemPin name Pin No. I/O Pull-up FunctionQFP1

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-38 EPSON S1C33210 FUNCTION PARTAt cold start, these bits are set to "111" (7 cycles). At hot sta

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-39A10DRA: Area 10 burst ROM selection (D8) / Areas 10–9 set-up register (0x48

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-40 EPSON S1C33210 FUNCTION PARTRCA1–RCA0: Column address size selection (D[B:A]) / Bus control register (0

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-41RRA1–RRA0: Refresh RAS pulse width selection (D[6:5]) / Bus control registe

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-42 EPSON S1C33210 FUNCTION PARTSWAITE: #WAIT enable (D0) / Bus control register (0x4812E)Enable or disable

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-43CRAS: Successive RAS mode (D8) / DRAM timing set-up register (0x48130)Set t

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-44 EPSON S1C33210 FUNCTION PARTA18IO: Areas 18–17 internal/external access selection (DF) / Access control

II CORE BLOCK: BCU (Bus Control Unit)S1C33210 FUNCTION PART EPSON B-II-4-45A18RD: Areas 18–17 read signal (D7) / G/A read signal control register (0x4

II CORE BLOCK: BCU (Bus Control Unit)B-II-4-46 EPSON S1C33210 FUNCTION PARTA1X1MD: Area 1 access speed (D3) / BCLK select register (0x4813A)Select a n

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-1II-5 ITC (Interrupt Controller)The C33 Core Block contains an interrupt

NOTICENo part of this material may be reproduced or duplicated in any form or by any means without the writtenpermission of Seiko Epson. Seiko Epson r

1 OUTLINEA-6 EPSON S1C33210 PRODUCT PARTPin name Pin No. I/O Pull-up FunctionQFP15-128#CE4#CE11#CE11&1235 O – #CE4: Area 4 chip enable when CEFUN

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-2 EPSON S1C33210 FUNCTION PARTContents of table"Hex No." indicates an interrupt number in he

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-3Interrupt Factors and Intelligent DMASeveral interrupt factors can be se

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-4 EPSON S1C33210 FUNCTION PARTTrap TableThe C33 Core Block allows the base (starting) address of the t

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-5Control of Maskable InterruptsStructure of the Interrupt ControllerThe i

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-6 EPSON S1C33210 FUNCTION PARTThe IL is rewritten for only maskable interrupts and not for any other t

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-7Interrupt enable registerThis register controls the output of an interru

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-8 EPSON S1C33210 FUNCTION PARTInterrupt Priority Register and Interrupt LevelsThe interrupt priority r

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-9IDMA InvocationThe interrupt factors for which IDMA channel numbers are

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-10 EPSON S1C33210 FUNCTION PARTInterrupt after IDMA transferTo generate an interrupt after completion

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-11HSDMA InvocationSome interrupt factors can invoke high-speed DMAs (HSDM

1 OUTLINES1C33210 PRODUCT PART EPSON A-7Table 1.3.3 List of Pins for HSDMA Control SignalsPin name Pin No. I/O Pull-up FunctionQFP15-128K50#DMAREQ01

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-12 EPSON S1C33210 FUNCTION PARTI/O Memory of Interrupt ControllerTable 5.3 shows the control bits of t

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-13NameAddressRegister name Bit Function Setting Init. R/W Remarks–0 to 70

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-14 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksE16TC5E1

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-15NameAddressRegister name Bit Function Setting Init. R/W Remarks–FP7FP6F

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-16 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksHSD1S3HS

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-17NameAddressRegister name Bit Function Setting Init. R/W RemarksT8CH5S0S

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-18 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–A10BW1A

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-19Fxxx: Interrupt factor flagIndicate the status of interrupt factors gen

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-20 EPSON S1C33210 FUNCTION PARTDExxx: IDMA enable registerEnable or disable the IDMA request.When usin

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-21DENONLY: IDMA enable register set method selection (D2) / Flag set/r

1 OUTLINEA-8 EPSON S1C33210 PRODUCT PARTTable 1.3.4 List of Pins for Internal Peripheral CircuitsPin name Pin No. I/O Pull-up FunctionQFP15-128K52#A

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-22 EPSON S1C33210 FUNCTION PARTSIO2TS0: SIO Ch.2 transmit-buffer empty/FP3 interrupt factor switching(

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-23SIO2RS1: SIO Ch.2 receive-buffer full/TM16 Ch.5 compare B interrupt fac

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-24 EPSON S1C33210 FUNCTION PARTSIO3ES1: SIO Ch.3 receive error/TM16 Ch.3 compare A interrupt factor sw

II CORE BLOCK: ITC (Interrupt Controller)S1C33210 FUNCTION PART EPSON B-II-5-25TTBR09–TTBR00: Trap table base address [9:0] (D[9:0]) / TTBR low-order

II CORE BLOCK: ITC (Interrupt Controller)B-II-5-26 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

II CORE BLOCK: CLG (Clock Generator)S1C33210 FUNCTION PART EPSON B-II-6-1II-6 CLG (Clock Generator)This section describes the method for controlling t

II CORE BLOCK: CLG (Clock Generator)B-II-6-2 EPSON S1C33210 FUNCTION PARTI/O Pins of Clock GeneratorTable 6.1 lists the I/O pins of the clock generato

II CORE BLOCK: CLG (Clock Generator)S1C33210 FUNCTION PART EPSON B-II-6-3PLLThe PLL inputs the OSC3 clock and multiply its frequency. The multiply mod

II CORE BLOCK: CLG (Clock Generator)B-II-6-4 EPSON S1C33210 FUNCTION PARTSetting and Switching Over the CPU Operating ClockSetting the CPU operating c

II CORE BLOCK: CLG (Clock Generator)S1C33210 FUNCTION PART EPSON B-II-6-5Power-Control Register Protection FlagThe power-control register at address 0

1 OUTLINES1C33210 PRODUCT PART EPSON A-9Pin name Pin No. I/O Pull-up FunctionQFP15-128P13EXCL3T8UF3DPCO124 I/O – P13: I/O port when CFP13(D3/0x402D4)

II CORE BLOCK: CLG (Clock Generator)B-II-6-6 EPSON S1C33210 FUNCTION PARTI/O Memory of Clock GeneratorTable 6.4 lists the control bits of clock genera

II CORE BLOCK: CLG (Clock Generator)S1C33210 FUNCTION PART EPSON B-II-6-7CLKCHG: CPU operating clock switch (D2) / Power control register (0x40180)Sel

II CORE BLOCK: CLG (Clock Generator)B-II-6-8 EPSON S1C33210 FUNCTION PARTThe following shows the operating status in HALT mode (basic mode and HALT2 m

II CORE BLOCK: CLG (Clock Generator)S1C33210 FUNCTION PART EPSON B-II-6-9Programming Notes (1) Immediately after the high-speed (OSC3) oscillation ci

II CORE BLOCK: CLG (Clock Generator)B-II-6-10 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

II CORE BLOCK: DBG (Debug Unit)S1C33210 FUNCTION PART EPSON B-II-7-1II-7 DBG (Debug Unit)Debug CircuitThe C33 Core Block has a built-in debug circuit.

II CORE BLOCK: DBG (Debug Unit)B-II-7-2 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

S1C33210 FUNCTION PARTIII PERIPHERAL BLOCK

III PERIPHERAL BLOCK: INTRODUCTIONS1C33210 FUNCTION PART EPSON B-III-1-1III-1 INTRODUCTIONThe C33 peripheral block consists of a prescaler, six 8-bit

1 OUTLINEA-10 EPSON S1C33210 PRODUCT PARTPin name Pin No. I/O Pull-up FunctionQFP15-128DTR 95 O – DTR output *1RTS 94 O – RTS output*1TXDSOUT3100 O –

III PERIPHERAL BLOCK: INTRODUCTIONB-III-1-2 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

III PERIPHERAL BLOCK: PRESCALERS1C33210 FUNCTION PART EPSON B-III-2-1III-2 PRESCALERConfiguration of PrescalerThe prescaler divides the source clock (

III PERIPHERAL BLOCK: PRESCALERB-III-2-2 EPSON S1C33210 FUNCTION PARTSelecting Division Ratio and Output Control for PrescalerThe prescaler has regist

III PERIPHERAL BLOCK: PRESCALERS1C33210 FUNCTION PART EPSON B-III-2-3I/O Memory of PrescalerTable 2.3 shows the control bits of the prescaler.Table 2.

III PERIPHERAL BLOCK: PRESCALERB-III-2-4 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks––P16TON3P16TS32P1

III PERIPHERAL BLOCK: PRESCALERS1C33210 FUNCTION PART EPSON B-III-2-5NameAddressRegister name Bit Function Setting Init. R/W Remarks1 On 0 OffP8TON3P8

III PERIPHERAL BLOCK: PRESCALERB-III-2-6 EPSON S1C33210 FUNCTION PARTCLGP7–CLGP0:Power-control register protection flag ([D[7:0]) / Power control prot

III PERIPHERAL BLOCK: PRESCALERS1C33210 FUNCTION PART EPSON B-III-2-7P16TON0: 16-bit timer 0 clock control (D3) / 16-bit timer 0 clock control registe

III PERIPHERAL BLOCK: PRESCALERB-III-2-8 EPSON S1C33210 FUNCTION PART1)Blocks that use an operating clock generated by the prescaler• 16-bit programma

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-1III-3 8-BIT PROGRAMMABLE TIMERSConfiguration of 8-Bit Programmabl

2 POWER SUPPLYS1C33210 PRODUCT PART EPSON A-112 Power SupplyThis chapter explains the operating voltage of the S1C33210.2.1 Power Supply PinsThe S1C3

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-2 EPSON S1C33210 FUNCTION PARTUses of 8-Bit Programmable TimersThe down-counter of the 8-bit pr

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-38-bit programmable timer 2 • Clock supply to the Ch.0 serial inte

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-4 EPSON S1C33210 FUNCTION PARTControl and Operation of 8-Bit Programmable TimerWith the 8-bit p

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-5Setting preset data (initial counter value)Each timer has an 8-bi

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-6 EPSON S1C33210 FUNCTION PARTWhen both the timer RUN/STOP control bit (PTRUNx) and the timer p

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-7Control of Clock OutputWhen outputting an underflow signal of the

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-8 EPSON S1C33210 FUNCTION PART8-Bit Programmable Timer Interrupts and DMAThe 8-bit programmable

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-9High-speed DMAThe underflow interrupt factor of the timer 0 to 3

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-10 EPSON S1C33210 FUNCTION PARTI/O Memory of 8-Bit Programmable TimersTable 3.6 shows the contr

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-11NameAddressRegister name Bit Function Setting Init. R/W Remarks–

2 POWER SUPPLYA-12 EPSON S1C33210 PRODUCT PART2.3 Power Supply for Analog Circuits (AVDD)The analog power supply pin (AVDD) is provided separately fr

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-12 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-13CFP13–CFP10: P1[3:0] pin function selection (D[3:0]) / P1 functi

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-14 EPSON S1C33210 FUNCTION PARTPTD07–PTD00: Timer 0 counter data (D[7:0]) / 8-bit timer 0 count

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-15PTOUT0: Timer 0 clock output control register (D2) / 8-bit timer

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-16 EPSON S1C33210 FUNCTION PARTF8TUx is the interrupt factor flag corresponding to each timer.

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-3-17DE8TU0: Timer 0 IDMA enable (D2) / 16-bit timer 5, 8-bit timer,

III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERSB-III-3-18 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-1III-4 16-BIT PROGRAMMABLE TIMERSConfiguration of 16-Bit Programm

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-2 EPSON S1C33210 FUNCTION PARTI/O Pins of 16-Bit Programmable TimersTable 4.1 shows the input/

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-3Uses of 16-Bit Programmable TimersThe up-counters of the 16-bit

3 INTERNAL MEMORYS1C33210 PRODUCT PART EPSON A-133 Internal MemoryThis chapter explains the internal memory configuration.Figure 3.1 shows the S1C332

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-4 EPSON S1C33210 FUNCTION PARTControl and Operation of 16-Bit Programmable TimerThe following

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-5• External clockWhen using the timer as an event counter by supp

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-6 EPSON S1C33210 FUNCTION PARTResetting the counterEach timer includes the PRESETx bit to rese

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-7Controlling Clock OutputThe timers can generate a TMx signal usi

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-8 EPSON S1C33210 FUNCTION PARTWhen OUTINVx = "0" (active high):The timer outputs a l

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-916-Bit Programmable Timer Interrupts and DMAThe 16-bit programma

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-10 EPSON S1C33210 FUNCTION PARTFor IDMA to be invoked, the IDMA request and IDMA enable bits s

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-11Trap vectorsThe trap vector addresses for each default interrup

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-12 EPSON S1C33210 FUNCTION PARTI/O Memory of 16-Bit Programmable TimersTable 4.7 shows the con

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-13NameAddressRegister name Bit Function Setting Init. R/W Remarks

4 PERIPHERAL CIRCUITSA-14 EPSON S1C33210 PRODUCT PART4 Peripheral CircuitsThis chapter lists the built-in peripheral circuits and the I/O memory map.

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-14 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-15NameAddressRegister name Bit Function Setting Init. R/W Remarks

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-16 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-17NameAddressRegister name Bit Function Setting Init. R/W Remarks

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-18 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-19CFP16–CFP10: P1[6:0] pin function selection (D[6:0]) / P1 funct

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-20 EPSON S1C33210 FUNCTION PARTSELFM0: Timer 0 fine mode selection (D6) / 16-bit timer 0 contr

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-21CKSL0: Timer 0 input clock selection (D3) / 16-bit timer 0 cont

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-22 EPSON S1C33210 FUNCTION PARTPRUN0: Timer 0 RUN/STOP control (D0) / 16-bit timer 0 control r

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-23TC015–TC00: Timer 0 counter data (D[F:0]) / 16-bit timer 0 coun

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-154.2 I/O Memory MapTable 4.2.1 I/O Memory MapNameAddressRegister name Bit Function Setting Init.

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-24 EPSON S1C33210 FUNCTION PARTF16TUx and F16TCx are the interrupt factor flags corresponding

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSS1C33210 FUNCTION PART EPSON B-III-4-25DE16TU0, DE16TC0: Timer 0 IDMA enable (D6, D7) /Port input 0–3,

III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERSB-III-4-26 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

III PERIPHERAL BLOCK: WATCHDOG TIMERS1C33210 FUNCTION PART EPSON B-III-5-1III-5 WATCHDOG TIMERConfiguration of Watchdog TimerThe Periheral Block incor

III PERIPHERAL BLOCK: WATCHDOG TIMERB-III-5-2 EPSON S1C33210 FUNCTION PARTResetting the watchdog timerWhen using the watchdog timer, prepare a routine

III PERIPHERAL BLOCK: WATCHDOG TIMERS1C33210 FUNCTION PART EPSON B-III-5-3I/O Memory of Watchdog TimerTable 5.1 shows the control bits of the watchdog

III PERIPHERAL BLOCK: WATCHDOG TIMERB-III-5-4 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITS1C33210 FUNCTION PART EPSON B-III-6-1III-6 LOW-SPEED (OSC1) OSCILLATION CIRCUITConfiguratio

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITB-III-6-2 EPSON S1C33210 FUNCTION PARTOscillator TypesIn the low-speed (OSC1) oscillation ci

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITS1C33210 FUNCTION PART EPSON B-III-6-3Controlling OscillationThe low-speed (OSC1) oscillatio

S1C33210 Technical ManualThis manual describes the hardware specifications of the Seiko Epson original 32-bit microcomputer S1C33210.S1C33210 PRODUCT

4 PERIPHERAL CIRCUITSA-16 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks––P16TON3P16TS32P16TS31P16TS30D7–

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITB-III-6-4 EPSON S1C33210 FUNCTION PARTPower-Control Register Protection FlagThe power-contro

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITS1C33210 FUNCTION PART EPSON B-III-6-5I/O Memory of Clock GeneratorTable 6.3 lists the contr

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITB-III-6-6 EPSON S1C33210 FUNCTION PARTSOSC1: Low-speed (OSC1) oscillation control (D0) / Pow

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITS1C33210 FUNCTION PART EPSON B-III-6-7The following shows the operating status in HALT mode

III PERIPHERAL BLOCK: LOW-SPEED (OSC1) OSCILLATION CIRCUITB-III-6-8 EPSON S1C33210 FUNCTION PARTCFP14: P14 function selection (D4) / P1 function selec

III PERIPHERAL BLOCK: CLOCK TIMERS1C33210 FUNCTION PART EPSON B-III-7-1III-7 CLOCK TIMERConfiguration of Clock TimerThe clock timer consists of an 8-b

III PERIPHERAL BLOCK: CLOCK TIMERB-III-7-2 EPSON S1C33210 FUNCTION PARTControl and Operation of the Clock TimerInitial settingAt initial reset, the cl

III PERIPHERAL BLOCK: CLOCK TIMERS1C33210 FUNCTION PART EPSON B-III-7-3 RUN/STOP the clock timerThe clock timer starts counting when "1" is

III PERIPHERAL BLOCK: CLOCK TIMERB-III-7-4 EPSON S1C33210 FUNCTION PARTSetting alarm functionThe clock timer has an alarm function, enabling an interr

III PERIPHERAL BLOCK: CLOCK TIMERS1C33210 FUNCTION PART EPSON B-III-7-5An interrupt can be generated on a specified alarm day at a specified time as d

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-17NameAddressRegister name Bit Function Setting Init. R/W Remarks1 On 0 OffP8TON3P8TS32P8TS31P8TS3

III PERIPHERAL BLOCK: CLOCK TIMERB-III-7-6 EPSON S1C33210 FUNCTION PARTExamples of Use of Clock TimerThe following shows examples of use of the clock

III PERIPHERAL BLOCK: CLOCK TIMERS1C33210 FUNCTION PART EPSON B-III-7-7I/O Memory of Clock TimerTable 7.5 shows the control bits of the clock timer.Ta

III PERIPHERAL BLOCK: CLOCK TIMERB-III-7-8 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 59 minutes(

III PERIPHERAL BLOCK: CLOCK TIMERS1C33210 FUNCTION PART EPSON B-III-7-9TCRUN: Clock timer RUN/STOP control (D0) / Clock timer Run/Stop register (0x401

III PERIPHERAL BLOCK: CLOCK TIMERB-III-7-10 EPSON S1C33210 FUNCTION PARTTCASE2–TCASE0: Alarm factor select register (D[4:2]) / Clock timer interrupt c

III PERIPHERAL BLOCK: CLOCK TIMERS1C33210 FUNCTION PART EPSON B-III-7-11ECTM: Clock timer interrupt enable (D1) / Port input 4–7, clock timer, A/D int

III PERIPHERAL BLOCK: CLOCK TIMERB-III-7-12 EPSON S1C33210 FUNCTION PARTProgramming Notes (1) The low-speed (OSC1) oscillation circuit, which is the

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-1III-8 SERIAL INTERFACEConfiguration of Serial InterfacesFeatures of Serial

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-2 EPSON S1C33210 FUNCTION PARTI/O Pins of Serial InterfaceTable 8.1 lists the I/O pins used by the seria

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-3Method for setting the serial-interface input/output pinsAll of the pins u

4 PERIPHERAL CIRCUITSA-18 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–TCHD5TCHD4TCHD3TCHD2TCHD1TCHD0D7

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-4 EPSON S1C33210 FUNCTION PARTClock-Synchronized InterfaceOutline of Clock-Synchronized InterfaceIn the

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-5Setting Clock-Synchronized InterfaceWhen performing clock-synchronized tra

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-6 EPSON S1C33210 FUNCTION PARTRLD =fPSCIN × pdr- 1 (Eq. 1)2 × bpsRLD: Reload data register setup value o

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-7Control and Operation of Clock-Synchronized TransferTransmit control (1) E

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-8 EPSON S1C33210 FUNCTION PART• Clock-synchronized master modeThe timing at which the device starts tran

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-9The #SRDYx signal is returned to a high level at this point.3. The data in

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-10 EPSON S1C33210 FUNCTION PARTCh.0 receive data buffer full: RDBF0 (D0) / Serial I/F Ch.0 status regist

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-111. After setting the #SRDYx signal to a low level (ready to receive), the

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-12 EPSON S1C33210 FUNCTION PARTAsynchronous InterfaceOutline of Asynchronous InterfaceAsynchronous trans

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-13Setting Asynchronous InterfaceWhen performing asynchronous transfer via t

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-19NameAddressRegister name Bit Function Setting Init. R/W Remarks–PTOUT0PSET0PTRUN0D7–3D2D1D0reser

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-14 EPSON S1C33210 FUNCTION PARTAny desired clock frequency can be obtained by setting the prescaler divi

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-15• Sampling clockIn the asynchronous mode, TCLK (the clock output by the 8

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-16 EPSON S1C33210 FUNCTION PARTSetting the data formatIn the asynchronous mode, the data length is 7 or

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-17The transfer status can be checked using the transmit-completion flag (TE

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-18 EPSON S1C33210 FUNCTION PARTReceive control (1) Enabling receive operationsUse the receive-enable bit

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-19Note: The receive operation is terminated when the first stop bit is samp

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-20 EPSON S1C33210 FUNCTION PART• Overrun errorIf during successive receive operations, a receive operati

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-21IrDA InterfaceOutline of IrDA InterfaceEach channel of the serial interfa

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-22 EPSON S1C33210 FUNCTION PARTSelecting the IrDA interface functionTo use the IrDA interface function,

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-23Control and Operation of IrDA InterfaceThe transmit/receive procedures ha

4 PERIPHERAL CIRCUITSA-20 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–PTOUT3PSET3PTRUN3D7–3D2D1D0reser

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-24 EPSON S1C33210 FUNCTION PART Serial Interface Interrupts and DMAThe serial interface can generate the

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-25The interrupt priority register sets the interrupt priority level of each

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-26 EPSON S1C33210 FUNCTION PARTIf an interrupt factor occurs when the IDMA request and enable bits are s

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-27• Ch.2 and Ch.3For Ch.2 and Ch.3, either port input interrupts or 16-bit

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-28 EPSON S1C33210 FUNCTION PARTI/O Memory of Serial InterfaceTable 8.14 shows the control bits of the se

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-29NameAddressRegister name Bit Function Setting Init. R/W Remarks–TEND1FER1

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-30 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0x0 to 0xF

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-31NameAddressRegister name Bit Function Setting Init. R/W Remarks–FSTX1FSRX

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-32 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–CFP05CFP0

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-33CFP162: P16 function selection 2 (D1) / Port SIO function extension regis

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-21NameAddressRegister name Bit Function Setting Init. R/W RemarksWRWD–D7D6–0EWD write protection–0

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-34 EPSON S1C33210 FUNCTION PARTSSCLK2: Serial I/F Ch.2 SCLK selection (D2) / Port SIO function extension

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-35RXD07–RXD00: Ch.0 receive data (D[7:0]) / Serial I/F Ch.0 receive data re

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-36 EPSON S1C33210 FUNCTION PARTPER0: Ch.0 parity-error flag (D3) / Serial I/F Ch.0 status register (0x40

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-37RDBF0: Ch.0 receive data buffer full (D0) / Serial I/F Ch.0 status regist

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-38 EPSON S1C33210 FUNCTION PARTEPR0: Ch.0 parity enable (D5) / Serial I/F Ch.0 control register (0x401E3

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-39SSCK0: Ch.0 input clock selection (D2) / Serial I/F Ch.0 control register

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-40 EPSON S1C33210 FUNCTION PARTIRTL0: Ch.0 IrDA output logic inversion (D3) / Serial I/F Ch.0 IrDA regis

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-41ESERR0, ESRX0, ESTX0: Ch.0 interrupt enable (D0,D1,D2) / Serial I/F inter

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-42 EPSON S1C33210 FUNCTION PARTRSRX0, RSTX0: Ch.0 IDMA request (D6, D7) /16-bit timer 5, 8-bit timer, se

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-43SIO2RS0: SIO Ch.2 receive-buffer full/FP1 interrupt factor switching(D1)

4 PERIPHERAL CIRCUITSA-22 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksCLKDT1CLKDT0PSCON–CLKCHGSOSC3SOSC

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-44 EPSON S1C33210 FUNCTION PARTSIO3TS0: SIO Ch.3 transmit-buffer empty/FP6 interrupt factor switching(D6

III PERIPHERAL BLOCK: SERIAL INTERFACES1C33210 FUNCTION PART EPSON B-III-8-45SIO3TS1: SIO Ch.3 transmit-buffer empty/TM16 Ch.4 compare A interrupt fac

III PERIPHERAL BLOCK: SERIAL INTERFACEB-III-8-46 EPSON S1C33210 FUNCTION PARTProgramming Notes (1) Before setting various serial-interface parameters

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-1III-9 INPUT/OUTPUT PORTSThe Peripheral Block has a total of 42 input/out

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-2 EPSON S1C33210 FUNCTION PARTInput-Port PinsThe input pins concurrently serve as the input pins for p

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-3I/O Memory of Input PortsTable 9.2 shows the control bits of the input p

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-4 EPSON S1C33210 FUNCTION PARTI/O Ports (P Ports)Structure of I/O PortThe Peripheral Block contains 29

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-5Pin name I/O Pull-up Function Function select bitP20/#DRD I/O – I/O port

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-6 EPSON S1C33210 FUNCTION PARTI/O Memory of I/O PortsTable 9.4 shows the control bits of the I/O ports

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-7NameAddressRegister name Bit Function Setting Init. R/W Remarks–CFP322CF

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-23NameAddressRegister name Bit Function Setting Init. R/W Remarks0x0 to 0xFF(0x7F)TXD07TXD06TXD05T

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-8 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–CFEX5CFE

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-9IOC05–IOC00: P0[5:0] port I/O control (D[5:0]) / P0 port I/O control reg

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-10 EPSON S1C33210 FUNCTION PARTCFEX0: P12, P14 function extension (D0) / Port function extension regis

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-11Input InterruptThe input ports and the I/O ports support eight system o

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-12 EPSON S1C33210 FUNCTION PARTConditions for port input-interrupt generationEach port input interrupt

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-13Key Input InterruptThe key input interrupt circuit has two interrupt sy

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-14 EPSON S1C33210 FUNCTION PARTSelecting input pinsFor the FPK1 interrupt system, a four-bit input pin

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-15Since K50 is masked from interrupt by SMPK00, no interrupt occurs at th

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-16 EPSON S1C33210 FUNCTION PARTTable 9.9 Control Bits for IDMA TransferSystem IDMA request bit IDMA e

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-17I/O Memory for Input InterruptsTable 9.10 shows the control bits for th

4 PERIPHERAL CIRCUITSA-24 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0x0 to 0xFF(0x7F)TXD17TXD16TXD15T

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-18 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–FP7FP6F

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-19NameAddressRegister name Bit Function Setting Init. R/W Remarks–SPPK11S

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-20 EPSON S1C33210 FUNCTION PARTSPPT7–SPPT0: Input polarity selection (D[7:0]) / Port interrupt input p

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-21SMPK13–SMPK10: FPK1 input mask (D[3:0]) / FPK1 input mask register (0x4

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-22 EPSON S1C33210 FUNCTION PARTFP3–FP0: Port input 3–0 interrupt factor flag (D[3:0]) /Key input, port

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSS1C33210 FUNCTION PART EPSON B-III-9-23RP3–RP0: Port input 3–0 IDMA request (D[3:0]) /Port input 0–3, high-spe

III PERIPHERAL BLOCK: INPUT/OUTPUT PORTSB-III-9-24 EPSON S1C33210 FUNCTION PART (5) When a port input interrupt is used to trigger a restart from HAL

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-1III-10 Monitored Mobile Access InterfacesConfiguration

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-2 EPSON S1C33210 FUNCTION PARTI/O Pins for Mobile Access InterfacesTable 10.1 lists t

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-3CTS (CTS input pin)The function of this input pin depen

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-25NameAddressRegister name Bit Function Setting Init. R/W RemarksTXEN2RXEN2EPR2PMD2STPB2SSCK2SMD21

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-4 EPSON S1C33210 FUNCTION PARTList of Pin FunctionsTable 10.2 lists the five mobile a

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-5Communications ModeNext configure the mobile access int

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-6 EPSON S1C33210 FUNCTION PART64 kbps: 10 msDCD (frame signal)Frame signal periodPIAF

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-732 kbps: 20 ms125 µs 125 µs0123****4567****89Note: *Th

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-8 EPSON S1C33210 FUNCTION PARTPDC Communications ModeOverviewThe PDC communications m

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-9bit 7 ¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥ 0x02005800x020057E0x0200540

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-10 EPSON S1C33210 FUNCTION PARTPDC Communications Control and OperationTransmit Contr

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-11PHS Communications ModeOverviewThe PHS communications

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-12 EPSON S1C33210 FUNCTION PARTData BuffersPHS communications uses two 80-byte buffer

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-13PHS Communications Control and OperationTransmit Contr

4 PERIPHERAL CIRCUITSA-26 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksADD7ADD6ADD5ADD4ADD3ADD2ADD1ADD0D

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-14 EPSON S1C33210 FUNCTION PARTHDLC Communications ModeOverviewThe HDLC communication

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-15HDLC Communications Control and OperationTransmit Cont

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-16 EPSON S1C33210 FUNCTION PARTIf the enable bit in the HDLC receive operation settin

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-17(2) HDLC Receive Interrupts (Rx INT)The Rx INT and Sp

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-18 EPSON S1C33210 FUNCTION PARTMobile Access Interface InterruptsOverviewThe mobile a

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-19(5) TXINT = HDLC transmit interruptInterrupt source Th

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-20 EPSON S1C33210 FUNCTION PARTD. Interrupt source: Idle detectCondition The signal l

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-21I/O Memory for Mobile Access InterfacesTable 10.11 lis

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-22 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-23NameAddressRegister name Bit Function Setting Init. R/

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-27NameAddressRegister name Bit Function Setting Init. R/W Remarks–0 to 70 to 7––PP1L2PP1L1PP1L0–PP

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-24 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-25NameAddressRegister name Bit Function Setting Init. R/

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-26 EPSON S1C33210 FUNCTION PARTBMODE, BHALF, FMODE: PHS signal format (D[2:0]) / Com

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-27CNT2, CNT1: Output port data (D[1:0]) /Communications

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-28 EPSON S1C33210 FUNCTION PARTSDRI, SURI, SDCTS, SUCTS, SDDCD, SUDCD, SDDSR, SUDSR:

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-29INTE: PDC interrupt enable (D1) / PDC interrupt regist

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-30 EPSON S1C33210 FUNCTION PARTTXINTE: PHS transmit interrupt enable (D7) / PHS trans

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-31RXINT: PHS receive interrupt flag (D7) / PHS receive s

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-32 EPSON S1C33210 FUNCTION PARTABRTIES: HDLC enable bit for Abort (D7) / HDLC interru

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-33ABRTIEC: HDLC clear enable bit for Abort (D7) / HDLC c

4 PERIPHERAL CIRCUITSA-28 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–0 to 70 to 7––PSIO02PSIO01PSIO00

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-34 EPSON S1C33210 FUNCTION PARTRXENS: HDLC receive enable (D7) / HDLC transfer settin

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-35RXENC: HDLC clear receive enable (D7) / HDLC cancel tr

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-36 EPSON S1C33210 FUNCTION PARTTXFTH[1:0]: HDLC transmit queue interrupt threshold (

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-37RXADD[7:0]: HDLC receive address (D[7:0]) / HDLC recei

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-38 EPSON S1C33210 FUNCTION PARTRXINTS[1:0]: HDLC receive interrupt setup (D[1:0]) / H

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-39RXD[7:0]: HDLC receive data (D[7:0]) / HDLC receive da

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-40 EPSON S1C33210 FUNCTION PARTABORT: HDLC Abort detected (D7) / HDLC E/S INT receive

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESS1C33210 FUNCTION PART EPSON B-III-10-41RXOVR: HDLC Rx overrun detected (D7) / HDLC Sp INT rec

III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACESB-III-10-42 EPSON S1C33210 FUNCTION PARTImportant Notes on DebuggingICD33 debugging mode suppo

S1C33210 FUNCTION PARTIV ANALOG BLOCK

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-29NameAddressRegister name Bit Function Setting Init. R/W Remarks–EK1EK0EP3EP2EP1EP0D7–6D5D4D3D2D1

IV ANALOG BLOCK: INTRODUCTIONS1C33210 FUNCTION PART EPSON B-IV-1-1IV-1 INTRODUCTIONThe analog block consists of a 10-bit A/D converter with 4 input ch

IV ANALOG BLOCK: INTRODUCTIONB-IV-1-2 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-1IV-2 A/D CONVERTERFeatures and Structure of A/D ConverterThe Analog Block contains

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-2 EPSON S1C33210 FUNCTION PARTI/O Pins of A/D ConverterTable 2.1 shows the pins used by the A/D converter.Table 2

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-3Setting A/D ConverterWhen the A/D converter is used, the following settings must be

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-4 EPSON S1C33210 FUNCTION PARTTable 2.3 Relationship between CS/CE and Input ChannelCS2/CE2 CS1/CE1 CS0/CE0 Chan

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-5Control and Operation of A/D ConversionFigure 2.2 shows the operation of the A/D co

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-6 EPSON S1C33210 FUNCTION PARTWhen a trigger is input, the A/D converter samples and A/D-converts the analog inpu

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-7A/D Converter Interrupt and DMAUpon completion of A/D conversion in each channel, t

4 PERIPHERAL CIRCUITSA-30 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–FK1FK0FP3FP2FP1FP0D7–6D5D4D3D2D1

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-8 EPSON S1C33210 FUNCTION PARTTrap vectorThe A/D converter's interrupt trap-vector default address is set to

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-9I/O Memory of A/D ConverterTable 2.6 shows the control bits of the A/D converter.Fo

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-10 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–0 to 70 to 7––PAD2

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-11ADD9–ADD0: A/D converted data (D[1:0]) / A/D conversion result (high-order) regist

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-12 EPSON S1C33210 FUNCTION PARTADF: Conversion-complete flag (D3) / A/D enable register (0x40244)Indicates that A

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-13ST1–ST0: Sampling-time setup (D[1:0]) / A/D sampling register (0x40245)Sets the an

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-14 EPSON S1C33210 FUNCTION PARTThe interrupt factor flag is set to "1" whenever interrupt generation co

IV ANALOG BLOCK: A/D CONVERTERS1C33210 FUNCTION PART EPSON B-IV-2-15Programming Notes (1) Before setting the conversion mode, start/end channels, etc

IV ANALOG BLOCK: A/D CONVERTERB-IV-2-16 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

S1C33210 FUNCTION PARTV DMA BLOCK

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-31NameAddressRegister name Bit Function Setting Init. R/W RemarksR16TC0R16TU0RHDM1RHDM0RP3RP2RP1RP

V DMA BLOCK: INTRODUCTIONS1C33210 FUNCTION PART EPSON B-V-1-1V-1 INTRODUCTIONThe DMA block is configured with two types of DMA controllers: HSDMA (Hig

V DMA BLOCK: INTRODUCTIONB-V-1-2 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-1V-2 HSDMA (High-Speed DMA)Functional Outline of HSDMAThe DMA Block contains fou

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-2 EPSON S1C33210 FUNCTION PARTI/O Pins of HSDMATable 2.1 lists the I/O pins used for HSDMA.Table 2.1 I/O Pin

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-3Programming Control InformationThe HSDMA operates according to the control info

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-4 EPSON S1C33210 FUNCTION PARTBlock lengthWhen using block transfer mode (DxMOD = "10"), the data b

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-5D0ADRL[15:0]: Ch. 0 destination address [15:0] (D[F:0]) / Ch. 0 low-order desti

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-6 EPSON S1C33210 FUNCTION PARTSetting the Registers in Single-Address ModeMake sure that the HSDMA channel is

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-7Address increment/decrement controlThe memory addresses can be incremented or d

4 PERIPHERAL CIRCUITSA-32 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksHSD1S3HSD1S2HSD1S1HSD1S0HSD0S3HSD

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-8 EPSON S1C33210 FUNCTION PARTTrigger FactorA HSDMA tigger factor can be selected from among 13 types using t

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-9Operation of HSDMAAn HSDMA channel starts data transfer by the selected trigger

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-10 EPSON S1C33210 FUNCTION PARTSuccessive transfer modeThe channel for which DxMOD in control information is

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-11Block transfer modeThe channel for which DxMOD in control information is set t

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-12 EPSON S1C33210 FUNCTION PARTOperation in Single-Address ModeThe operation of each transfer mode is almost

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-13Timing ChartDual-address mode(1) SRAMExample: When 2 (RD)/1 (WR) wait cycles a

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-14 EPSON S1C33210 FUNCTION PARTSingle-address mode(1) SRAMExample: When 2 (RD)/1 (WR) wait cycles are inserte

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-15Interrupt Function of HSDMAThe DMA controller can generate an interrupt when t

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-16 EPSON S1C33210 FUNCTION PARTIntelligent DMAIntelligent DMA (IDMA) can be invoked by the end-of-transfer in

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-17I/O Memory of HSDMATable 2.5 shows the control bits of HSDMA.Table 2.5 Contro

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-33NameAddressRegister name Bit Function Setting Init. R/W Remarks–CP4CFK52CFK51CFK50D7–4D3D2D1D0re

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-18 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksHSD1S3HSD1S2HSD

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-19NameAddressRegister name Bit Function Setting Init. R/W Remarks–CFP16CFP15CFP1

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-20 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks––DUALM0D0DIR–T

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-21NameAddressRegister name Bit Function Setting Init. R/W RemarksD0MOD1D0MOD0D0I

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-22 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksS1ADRL15S1ADRL1

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-23NameAddressRegister name Bit Function Setting Init. R/W RemarksD1MOD1D1MOD0D1I

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-24 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksS2ADRL15S2ADRL1

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-25NameAddressRegister name Bit Function Setting Init. R/W RemarksD2MOD1D2MOD0D2I

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-26 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksS3ADRL15S3ADRL1

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-27NameAddressRegister name Bit Function Setting Init. R/W RemarksD3MOD1D3MOD0D3I

4 PERIPHERAL CIRCUITSA-34 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksT8CH5S0SIO3TS0T8CH4S0SIO3RS0SIO2T

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-28 EPSON S1C33210 FUNCTION PARTIOC16–IOC15: P1[6:5] port I/O control (D[6:5]) / P1 I/O control register (0x40

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-29HSD0S3–HSD0S0: Ch. 0 trigger set-up (D[3:0]) / HSDMA Ch. 0/1 trigger set-up re

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-30 EPSON S1C33210 FUNCTION PARTHS0_EN: Ch. 0 enable (D0) / HSDMA Ch. 0 enable register (0x4822C)HS1_EN: Ch. 1

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-31D0MOD1–D0MOD0: Ch. 0 transfer mode (D[F:E]) / Ch. 0 high-order destination add

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-32 EPSON S1C33210 FUNCTION PARTD0IN1–D0IN0: Ch. 0 destination address control (D[D:C]) / Ch. 0 high-order des

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-33S0ADRL15–S0ADRL0: Ch. 0 source address[15:0](D[F:0]) / Ch. 0 low-order source

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-34 EPSON S1C33210 FUNCTION PARTEHDM0: Ch. 0 interrupt enable (D0) / DMA interrupt enable register (0x40271)EH

V DMA BLOCK: HSDMA (High-Speed DMA)S1C33210 FUNCTION PART EPSON B-V-2-35RHDM0: Ch.0 IDMA request (D4) / Port input 0–3, HSDMA, 16-bit timer 0 IDMA req

V DMA BLOCK: HSDMA (High-Speed DMA)B-V-2-36 EPSON S1C33210 FUNCTION PARTProgramming Notes (1) When setting the transfer conditions, always make sure

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-1V-3 IDMA (Intelligent DMA)Functional Outline of IDMAThe DMA Block contains an i

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-35NameAddressRegister name Bit Function Setting Init. R/W Remarks–SCPK04SCPK03SCPK02SCPK01SCPK00D7

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-2 EPSON S1C33210 FUNCTION PARTThe contents of control information (3 words) in each channel are shown in the

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-3BLKLEN[7:0]: Block size/transfer counter (D[7:0]/1st Word)In block transfer mod

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-4 EPSON S1C33210 FUNCTION PARTDSINC[1:0]: Destination address control (D[29:28]/3rd Word)Set the destination

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-5IDMA InvocationThe triggers by which IDMA is invoked have the following three c

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-6 EPSON S1C33210 FUNCTION PARTThese interrupt factors are used in common for interrupt requests and IDMA invo

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-7IDMA invocation request during a DMA transferAn IDMA invocation request to anot

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-8 EPSON S1C33210 FUNCTION PARTOperation of IDMAIDMA has three transfer modes, in each of which data transfer

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-9Successive transfer modeThe channels for which DMOD in control information is s

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-10 EPSON S1C33210 FUNCTION PARTBlock transfer modeThe channels for which DMOD in control information is set t

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-11Processing of interrupt factors by type of trigger• When invoked by an interru

TABLE OF CONTENTSEPSON iS1C33210 PRODUCT PARTTable of Contents1 Outline...

4 PERIPHERAL CIRCUITSA-36 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–IOC16IOC15IOC14IOC13IOC12IOC11IO

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-12 EPSON S1C33210 FUNCTION PARTLinkingIf the IDMA channel number to be executed next is set in the IDMA link

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-13Interrupt Function of Intelligent DMAIDMA can generate an interrupt that cause

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-14 EPSON S1C33210 FUNCTION PARTTrap vectorThe trap vector address for an interrupt upon completion of IDMA tr

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-15DBASEL[15:0]: IDMA base address [15:0] (D[F:0]) / IDMA base address low-order

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-16 EPSON S1C33210 FUNCTION PARTFIDMA: IDMA interrupt factor flag (D2) / DMA interrupt factor flag register (0

V DMA BLOCK: IDMA (Intelligent DMA)S1C33210 FUNCTION PART EPSON B-V-3-17Programming Notes (1) Before setting the IDMA base address, be sure to disabl

V DMA BLOCK: IDMA (Intelligent DMA)B-V-3-18 EPSON S1C33210 FUNCTION PARTTHIS PAGE IS BLANK.

S1C33210 FUNCTION PARTAppendix I/O MAP

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-1NameAddressRegister name Bit Function Setting Init. R/W Remarks–P8TPCK5P8TPCK4D7–2D1D0reserv

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-37NameAddressRegister name Bit Function Setting Init. R/W Remarks–CFEX5CFEX4CFEX3CFEX2CFEX1CFEX0D7

APPENDIX: I/O MAPB-APPENDIX-2 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks––P16TON3P16TS32P16TS31P16TS3

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-3NameAddressRegister name Bit Function Setting Init. R/W Remarks1 On 0 OffP8TON3P8TS32P8TS31P

APPENDIX: I/O MAPB-APPENDIX-4 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–TCHD5TCHD4TCHD3TCHD2TCHD1TCH

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-5NameAddressRegister name Bit Function Setting Init. R/W Remarks–PTOUT0PSET0PTRUN0D7–3D2D1D0r

APPENDIX: I/O MAPB-APPENDIX-6 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–PTOUT3PSET3PTRUN3D7–3D2D1D0r

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-7NameAddressRegister name Bit Function Setting Init. R/W RemarksWRWD–D7D6–0EWD write protecti

APPENDIX: I/O MAPB-APPENDIX-8 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksCLKDT1CLKDT0PSCON–CLKCHGSOSC3

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-9NameAddressRegister name Bit Function Setting Init. R/W Remarks0x0 to 0xFF(0x7F)TXD07TXD06TX

APPENDIX: I/O MAPB-APPENDIX-10 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0x0 to 0xFF(0x7F)TXD17TXD16T

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-11NameAddressRegister name Bit Function Setting Init. R/W RemarksTXEN2RXEN2EPR2PMD2STPB2SSCK2

4 PERIPHERAL CIRCUITSA-38 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–A12SZA12DF1A12DF0–A12WT2A12WT1A1

APPENDIX: I/O MAPB-APPENDIX-12 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksADD7ADD6ADD5ADD4ADD3ADD2ADD1

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-13NameAddressRegister name Bit Function Setting Init. R/W Remarks–0 to 70 to 7––PP1L2PP1L1PP1

APPENDIX: I/O MAPB-APPENDIX-14 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–0 to 70 to 7––PSIO02PSIO01P

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-15NameAddressRegister name Bit Function Setting Init. R/W Remarks–EK1EK0EP3EP2EP1EP0D7–6D5D4D

APPENDIX: I/O MAPB-APPENDIX-16 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–FK1FK0FP3FP2FP1FP0D7–6D5D4D

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-17NameAddressRegister name Bit Function Setting Init. R/W RemarksR16TC0R16TU0RHDM1RHDM0RP3RP2

APPENDIX: I/O MAPB-APPENDIX-18 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksHSD1S3HSD1S2HSD1S1HSD1S0HSD0

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-19NameAddressRegister name Bit Function Setting Init. R/W Remarks–CP4CFK52CFK51CFK50D7–4D3D2D

APPENDIX: I/O MAPB-APPENDIX-20 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksT8CH5S0SIO3TS0T8CH4S0SIO3RS0

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-21NameAddressRegister name Bit Function Setting Init. R/W Remarks–SCPK04SCPK03SCPK02SCPK01SCP

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-39NameAddressRegister name Bit Function Setting Init. R/W Remarks–A6DF1A6DF0–A6WT2A6WT1A6WT0–A5SZA

APPENDIX: I/O MAPB-APPENDIX-22 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–IOC16IOC15IOC14IOC13IOC12IO

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-23NameAddressRegister name Bit Function Setting Init. R/W Remarks–CFEX5CFEX4CFEX3CFEX2CFEX1CF

APPENDIX: I/O MAPB-APPENDIX-24 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–A12SZA12DF1A12DF0–A12WT2A12

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-25NameAddressRegister name Bit Function Setting Init. R/W Remarks–A6DF1A6DF0–A6WT2A6WT1A6WT0–

APPENDIX: I/O MAPB-APPENDIX-26 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks1 Successive 0 Normal––CEFUN

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-27NameAddressRegister name Bit Function Setting Init. R/W Remarks–1 Enabled 0 Disabled1 Enabl

APPENDIX: I/O MAPB-APPENDIX-28 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR0A15CR0A14CR0A13

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-29NameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR1A15CR1A14CR1A13

APPENDIX: I/O MAPB-APPENDIX-30 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR2A15CR2A14CR2A13

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-31NameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR3A15CR3A14CR3A13

4 PERIPHERAL CIRCUITSA-40 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks1 Successive 0 Normal––CEFUNC1CEF

APPENDIX: I/O MAPB-APPENDIX-32 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR4A15CR4A14CR4A13

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-33NameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR5A15CR5A14CR5A13

APPENDIX: I/O MAPB-APPENDIX-34 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksDBASEL15DBASEL14DBASEL13DBAS

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-35NameAddressRegister name Bit Function Setting Init. R/W RemarksTC0_L7TC0_L6TC0_L5TC0_L4TC0_

APPENDIX: I/O MAPB-APPENDIX-36 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD0ADRL15D0ADRL14D0ADRL13D0AD

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-37NameAddressRegister name Bit Function Setting Init. R/W RemarksTC1_L7TC1_L6TC1_L5TC1_L4TC1_

APPENDIX: I/O MAPB-APPENDIX-38 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD1ADRL15D1ADRL14D1ADRL13D1AD

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-39NameAddressRegister name Bit Function Setting Init. R/W RemarksTC2_L7TC2_L6TC2_L5TC2_L4TC2_

APPENDIX: I/O MAPB-APPENDIX-40 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD2ADRL15D2ADRL14D2ADRL13D2AD

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-41NameAddressRegister name Bit Function Setting Init. R/W RemarksTC3_L7TC3_L6TC3_L5TC3_L4TC3_

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-41NameAddressRegister name Bit Function Setting Init. R/W Remarks–1 Enabled 0 Disabled1 Enabled 0

APPENDIX: I/O MAPB-APPENDIX-42 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD3ADRL15D3ADRL14D3ADRL13D3AD

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-43NameAddressRegister name Bit Function Setting Init. R/W Remarks–MCRS1MCRS0D15–2D1D0–Master

APPENDIX: I/O MAPB-APPENDIX-44 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–CP4EN4CP4EN3CP4EN2CP4EN1CP4

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-45NameAddressRegister name Bit Function Setting Init. R/W Remarks–ERESRESINT–RRXINTRTXINTD15–

APPENDIX: I/O MAPB-APPENDIX-46 EPSON S1C33210 FUNCTION PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–RXINTS1RXINTS0D15–2D1D0–Rec

APPENDIX: I/O MAPS1C33210 FUNCTION PART EPSON B-APPENDIX-47NameAddressRegister name Bit Function Setting Init. R/W Remarks–RCODE7RCODE6RCODE5RCODE4RCO

AMERICAEPSON ELECTRONICS AMERICA, INC.- HEADQUARTERS -150 River Oaks ParkwaySan Jose, CA 95134, U.S.A.Phone: +1-408-922-0200 Fax: +1-408-922-0238- S

In pursuit of “Saving” Technology, Epson electronic devices.Our lineup of semiconductors, displays and quartz devicesassists in creating the products

Technical ManualS1C33210ELECTRONIC DEVICES MARKETING DIVISIONhttp://www.epsondevice.comIssue December, 2002Printed in Japan O BEPSON Electronic Devi

4 PERIPHERAL CIRCUITSA-42 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR0A15CR0A14CR0A13CR0A1

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-43NameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR1A15CR1A14CR1A13CR1A1

4 PERIPHERAL CIRCUITSA-44 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR2A15CR2A14CR2A13CR2A1

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-45NameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR3A15CR3A14CR3A13CR3A1

TABLE OF CONTENTSii EPSONAppendix A <Reference> External Device Interface Timings...A-92A.1 DRAM (70ns)...

4 PERIPHERAL CIRCUITSA-46 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR4A15CR4A14CR4A13CR4A1

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-47NameAddressRegister name Bit Function Setting Init. R/W Remarks0 to 65535CR5A15CR5A14CR5A13CR5A1

4 PERIPHERAL CIRCUITSA-48 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksDBASEL15DBASEL14DBASEL13DBASEL12D

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-49NameAddressRegister name Bit Function Setting Init. R/W RemarksTC0_L7TC0_L6TC0_L5TC0_L4TC0_L3TC0

4 PERIPHERAL CIRCUITSA-50 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD0ADRL15D0ADRL14D0ADRL13D0ADRL12D

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-51NameAddressRegister name Bit Function Setting Init. R/W RemarksTC1_L7TC1_L6TC1_L5TC1_L4TC1_L3TC1

4 PERIPHERAL CIRCUITSA-52 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD1ADRL15D1ADRL14D1ADRL13D1ADRL12D

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-53NameAddressRegister name Bit Function Setting Init. R/W RemarksTC2_L7TC2_L6TC2_L5TC2_L4TC2_L3TC2

4 PERIPHERAL CIRCUITSA-54 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD2ADRL15D2ADRL14D2ADRL13D2ADRL12D

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-55NameAddressRegister name Bit Function Setting Init. R/W RemarksTC3_L7TC3_L6TC3_L5TC3_L4TC3_L3TC3

TABLE OF CONTENTSEPSON iiiS1C33210 FUNCTION PARTTable of ContentsI OUTLINEI-1 INTRODUCTION...

4 PERIPHERAL CIRCUITSA-56 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W RemarksD3ADRL15D3ADRL14D3ADRL13D3ADRL12D

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-57NameAddressRegister name Bit Function Setting Init. R/W Remarks–MCRS1MCRS0D15–2D1D0–Master confi

4 PERIPHERAL CIRCUITSA-58 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–CP4EN4CP4EN3CP4EN2CP4EN1CP4EN0D1

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-59NameAddressRegister name Bit Function Setting Init. R/W Remarks–ERESRESINT–RRXINTRTXINTD15–8D7D6

4 PERIPHERAL CIRCUITSA-60 EPSON S1C33210 PRODUCT PARTNameAddressRegister name Bit Function Setting Init. R/W Remarks–RXINTS1RXINTS0D15–2D1D0–Receive

4 PERIPHERAL CIRCUITSS1C33210 PRODUCT PART EPSON A-61NameAddressRegister name Bit Function Setting Init. R/W Remarks–RCODE7RCODE6RCODE5RCODE4RCODE3RC

5 POWER-DOWN CONTROLA-62 EPSON S1C33210 PRODUCT PART5 Power-Down ControlThis chapter describes the controls used to reduce power consumption of the d

5 POWER-DOWN CONTROLS1C33210 PRODUCT PART EPSON A-63Switching over the system clocksNormally, the system is clocked by the high-speed (OSC3) oscillat

5 POWER-DOWN CONTROLA-64 EPSON S1C33210 PRODUCT PARTFunction Control bit "1" "0" DefaultPrescaler ON/OFF PSCON(D5)/Power control

6 BASIC EXTERNAL WIRING DIAGRAMS1C33210 PRODUCT PART EPSON A-656 Basic External Wiring DiagramVDDAVDDDSIOTSTEA10MD0EA10MD1#X2SPDPLLCPLLS0PLLS1OSC3OSC

TABLE OF CONTENTSiv EPSONBus Speed Mode ...

7 PRECAUTIONS ON MOUNTINGA-66 EPSON S1C33210 PRODUCT PART7 Precautions on MountingThe following shows the precautions when designing the board and mo

7 PRECAUTIONS ON MOUNTINGS1C33210 PRODUCT PART EPSON A-67(2) When connecting between the VDD and VSS pins with a bypass capacitor, the pins should be

8 ELECTRICAL CHARACTERISTICSA-68 EPSON S1C33210 PRODUCT PART8 Electrical Characteristics8.1 Absolute Maximum Rating(VSS=0V)Item Symbol Condition Rate

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-698.2 Recommended Operating Conditions(VSS=0V)Item Symbol Condition Min. Typ. Max. Unit ∗Su

8 ELECTRICAL CHARACTERISTICSA-70 EPSON S1C33210 PRODUCT PART8.3 DC Characteristics(Unless otherwise specified: VDD=2.7V to 3.6V, Ta=-40°C to +85°C)It

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-718.4 Current Consumption(Unless otherwise specified: VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to

8 ELECTRICAL CHARACTERISTICSA-72 EPSON S1C33210 PRODUCT PART8.5 A/D Converter Characteristics(Unless otherwise specified: AVDD=VDD=2.7V to 3.6V, VSS=

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-73V'[000]h3FF3FE3FD003002001000VSSAVDDIntegral linearity error EL = [LSB]VN' - VN

8 ELECTRICAL CHARACTERISTICSA-74 EPSON S1C33210 PRODUCT PART8.6 AC Characteristics8.6.1 Symbol DescriptiontCYC: Bus-clock cycle time• In x1 mode,tCYC

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-758.6.3 C33 Block AC Characteristic TablesExternal clock input characteristics(Note) These

TABLE OF CONTENTSEPSON vIII PERIPHERAL BLOCKIII-1 INTRODUCTION...

8 ELECTRICAL CHARACTERISTICSA-76 EPSON S1C33210 PRODUCT PARTCommon characteristics(Unless otherwise specified: VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-77DRAM access cycle common characteristics(Unless otherwise specified: VDD=2.7V to 3.6V, VS

8 ELECTRICAL CHARACTERISTICSA-78 EPSON S1C33210 PRODUCT PART8.6.4 C33 Block AC Characteristic Timing ChartsClockOSC3(High-speed clock)tC3BCLK(Clock o

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-79SRAM read cycle (basic cycle: 1 cycle)BCLKA[23:0]#CEx#RDD[15:0]#WAITtC3tADtCE1 tCE2tRDD2t

8 ELECTRICAL CHARACTERISTICSA-80 EPSON S1C33210 PRODUCT PARTSRAM write cycle (basic cycle: 2 cycles)BCLKA[23:0]#CEx#WRD[15:0]#WAITC1 C2tADtCE1 tCE2tW

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-81DRAM random access cycle (basic cycle)BCLKA[23:0]#RAS#HCAS/#LCAS#RDD[15:0]#WED[15:0]RAS1D

8 ELECTRICAL CHARACTERISTICSA-82 EPSON S1C33210 PRODUCT PARTEDO DRAM random access cycle (basic cycle)BCLKA[23:0]#RAS#HCAS/#LCAS#RDD[15:0]#WED[15:0]R

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-83DRAM CAS-before-RAS refresh cycleBCLK#RAS#HCAS/#LCAS#WECBR refresh cycleCCBR1 CCBR2 CCBR3

8 ELECTRICAL CHARACTERISTICSA-84 EPSON S1C33210 PRODUCT PART#BUSREQ, #BUSACK and #NMI timingBCLK#BUSREQ#BUSACKeBUS_OUT signals ∗1eBUS_OUT signals ∗1#

8 ELECTRICAL CHARACTERISTICSS1C33210 PRODUCT PART EPSON A-858.7 Oscillation CharacteristicsOscillation characteristics change depending on conditions