Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manual de usuario descargar pdf (Pagina 127)

7 DETAILS OF INSTRUCTIONS

S1C33 FAMILY C33 PE CORE MANUAL

EPSON

119

ld.w %rd, %ss

Function

Word data transfer

Standard) rd

← ss

Extension 1) Unusable

Extension 2) Unusable

Code

15 12 11 8 7 4 3 0

1 0 1 0 0 1 0 0

s s r d

0xA4__

Flag

IE C V Z N

– – – – –

Mode

Src: Register direct %ss = %psr, %sp, %alr, %ahr, %ttbr, %idir, %dbbr, %pc

Dst: Register direct

%rd = %r0 to %r15

CLK

One cycle

Description

The content of a special register (word data) is transferred to the rd register.

Example

ld.w %r0,%psr ; r0 ← psr

Caution

(1) When a ld.w %rd,%pc instruction is executed, a value equal to the PC of this ld.w

instruction plus 2 is loaded into the register. This instruction must be executed as a delayed slot

instruction. If it does not follow a delayed branch instruction, the PC value that is loaded into

the rd register may not be the next instruction address to the ld.w instruction.

(2) When a special register other than the source registers listed above is specified as %ss, the

ld.w instruction will be executed as a nop instruction.

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Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manual de usuario Pagina 127