Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manual de usuario Pagina 158

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7 DETAILS OF INSTRUCTIONS
150
EPSON
S1C33 FAMILY C33 PE CORE MANUAL
rr %rd, %rs
Function
Rotate to the right
Standard) Rotate the content of rd to the right as many bits as specified by rs (0 to 31),
MSB
LSB
Extension 1) Unusable
Extension 2) Unusable
Code
15 12 11 8 7 4 3 0
1 0 0 1 1 0 0 1
r s r d
0x99__
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Flag
IE C V Z N
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Mode
Src: Register direct %rs = %r0 to %r15
Dst: Register direct
%rd = %r0 to %r15
CLK
One cycle
Description
(1) Standard
The rd register is rotated as shown in the diagram below. The number of bits to be shifted can
be specified in the range of 0 to 31 by the 5 low-order bits of the rs register. The value in the
least significant bit of the rd register is placed in the most significant bit.
31
rd register
(after execution)
0
(2) Delayed instruction
This instruction may be executed as a delayed instruction by writing it directly after a branch
instruction with the d bit included.
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