Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manual de usuario Pagina 79

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7 DETAILS OF INSTRUCTIONS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
71
btst [%rb], imm3
Function
Bit test
Standard) Z flag
1 if B[rb](imm3) = 0 else Z flag 0
Extension 1) Z flag
1 if B[rb + imm13](imm3) = 0 else Z flag 0
Extension 2) Z flag
1 if B[rb + imm26](imm3) = 0 else Z flag 0
Code
15 12 11 8 7 4 3 2 0
1 0 1 0 1 0 0 0
r b 0 imm3
0xA8__
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Flag
IE C V Z N
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Mode
Src: Immediate data (unsigned)
Dst: Register indirect
%rb = %r0 to %r15
CLK
Two cycles (three cycles when ext is used)
Description
(1) Standard
btst [
%rb],imm3 ; Z flag 1 if B[rb](imm3) = 0
; else Z flag
0
Tests a data bit of the byte data in the address specified with the
rb register and sets the Z (zero)
flag if the bit is 0. The 3-bit immediate
imm3 specifies the bit number to be tested (70).
(2) Extension 1
ext
imm13
btst [
%rb],imm3 ; Z flag 1 if B[rb + imm13](imm3) = 0
; else Z flag
0
The ext instruction changes the addressing mode to register indirect addressing with
displacement. The extended instruction tests the data bit specified with the
imm3 in the address
specified by adding the 13-bit immediate
imm13 to the contents of the rb register. It does not
change the contents of the rb register.
(3) Extension 2
ext
imm13 ; = imm26(25:13)
ext
imm13 ; = imm26(12:0)
btst [
%rb],imm3 ; Z flag 1 if B[rb + imm26](imm3) = 0
; else Z flag
0
The ext instructions change the addressing mode to register indirect addressing with
displacement. The extended instruction tests the data bit specified with the
imm3 in the address
specified by adding the 26-bit immediate
imm26 to the contents of the rb register. It does not
change the contents of the rb register.
Example
ld.w %r0,[%sp+0x10] ; Sets the memory address to be accessed
; to the R0 register.
btst [%r0],0x7 ; Tests Bit 7 of data in the specified
; address.
jreq POSITIVE ; Jumps if the bit is 0.
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