Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manual de usuario descargar pdf (Pagina 82)

7 DETAILS OF INSTRUCTIONS

EPSON

S1C33 FAMILY C33 PE CORE MANUAL

cmp %rd, %rs

Function

Comparison

Standard) rd

- rs

Extension 1) rs

- imm13

Extension 2) rs

- imm26

Code

15 12 11 8 7 4 3 0

0 0 1 0 1 0 1 0

r s r d

0x2A__

Flag

IE C V Z N

–

↔ ↔ ↔ ↔

Mode

Src: Register direct %rs = %r0 to %r15

Dst: Register direct

%rd = %r0 to %r15

CLK

One cycle

Description

(1) Standard

cmp

%rd,%rs ; rd - rs

Subtracts the contents of the rs register from the contents of the rd register, and sets or resets the

flags (C, V, Z and N) according to the results. It does not change the contents of the rd register.

(2) Extension 1

ext

imm13

cmp

%rd,%rs ; rs - imm13

Subtracts the 13-bit immediate

imm13 from the contents of the rs register, and sets or resets the

flags (C, V, Z and N) according to the results. It does not change the contents of the rd and rs

registers.

(3) Extension 2

ext

imm13 ; = imm26(25:13)

ext

imm13 ; = imm26(12:0)

cmp

%rd,%rs ; rs - imm26

Subtracts the 26-bit immediate

imm26 from the contents of the rs register, and sets or resets the

flags (C, V, Z and N) according to the results. It does not change the contents of the rd and rs

registers.

(4) Delayed instruction

This instruction may be executed as a delayed instruction by writing it directly after a branch

instruction with the “d” bit. In this case, extension of the immediate by the ext instruction

cannot be performed.

Example

(1) cmp %r0,%r1 ; Changes the flags according to the results of

; r0 - r1.

(2)

ext 0x1

ext 0x1fff

cmp %r1,%r2 ; Changes the flags according to the results of

; r2 - 0x3fff.

1 2 ... 77 78 79 80 81 82 83 84 85 86 87 ... 180 181

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