
7 DETAILS OF INSTRUCTIONS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
131
mltu.w %rd, %rs
Function
Unsigned 32-bit × 32-bit multiplication
Standard) {ahr, alr}
← rd × rs
Extension 1) Unusable
Extension 2) Unusable
Code
15 12 11 8 7 4 3 0
1 0 1 0 1 1 1 0
r s r d
0xAE__
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Flag
IE C V Z N
– – – – –
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Mode
Src: Register direct %rs = %r0 to %r15
Dst: Register direct
%rd = %r0 to %r15
CLK
Seven cycles
Description
The content of the rd register and the content of the rs register are multiplied together without signs,
and the 64-bit product resulting from the operation is loaded into the AHR and ALR register pair.
Example
mltu.w %r0,%r1 ; {ahr,alr} ← r0 × r1 unsigned multiplication
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