Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Manual de usuario Pagina 141

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7 DETAILS OF INSTRUCTIONS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
133
not %rd, %rs
Function
Logical negation
Standard) rd
!rs
Extension 1) Unusable
Extension 2) Unusable
Code
15 12 11 8 7 4 3 0
0 0 1 1 1 1 1 0
r s r d
0x3E__
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Flag
IE C V Z N
0
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Mode
Src: Register direct %rs = %r0 to %r15
Dst: Register direct
%rd = %r0 to %r15
CLK
One cycle
Description
(1) Standard
All the bits of the rs register are reversed, and the result is loaded into the rd register.
(2) Delayed instruction
This instruction may be executed as a delayed instruction by writing it directly after a branch
instruction with the d bit.
Example
When r1 = 0x55555555
not %r0,%r1 ; r0 = 0xAAAAAAAA
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