
1 SUMMARY
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
1
1 Summary
The C33 PE is a RISC type processor in the S1C33 series of Seiko Epson 32-bit microcomputers.
The C33 PE (Processor Element) Core is a Seiko Epson original 32-bit RISC-type core processor for the S1C33
Family microprocessors. Based on the C33 STD Core CPU features, some useful C33 ADV Core functions/
instructions were added and some of the infrequently used ones in general applications are removed to realize a
high cost-performance core unit with high processing speed.
The C33 PE Core has been designed with optimization for embedded applications (full RTL design) in mind to
short development time and to reduce cost.
As the principal instructions are object-code compatible with the C33 STD Core CPU, the software assets that the
user has accumulated in the past can be effectively utilized.
1.1 Features
Processor type
• Seiko Epson original 32-bit RISC processor
• 32-bit internal data processing
• Contains a 32-bit × 16-bit multiplier
Operating-clock frequency
• DC to 66 MHz or higher (depending on the processor model and process technology)
Instruction set
• Code length 16-bit fixed length
• Number of instructions 125
• Execution cycle Main instructions executed in one cycles
• Extended immediate instructions Immediate extended up to 32 bits
• Multiplication instructions Multiplications for 16
× 16 and 32 × 32 bits supported
Register set
• 32-bit general-purpose registers
• 32-bit special registers
Memory space and external bus
• Instruction, data, and I/O coexisting linear space
• Up to 4G bytes of memory space
• Harvard architecture using separated instruction bus and data bus
Interrupts
• Reset, NMI, and 240 external interrupts supported
• Four software exceptions
• Three instruction execution exceptions
• Direct branching from vector table to interrupt handler routine
Power-down mode
• HALT mode
• SLEEP mode
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